Re: Trigger FPGA

[René Prieels <R.Prieels@fynu.ucl.ac.be>]

Dear peter,

The TRIGGER unit has only LVDS inputs and outputs. All should be 
terminated on 100 ohms.
1) The inputs are all the 7 connectors in the back of the module and 
the 100 ohms resistors are normally plugged into the board close to 
each connector.
2) The outputs are the two connectors in the front section of the PCB.

Best regards,
René
`
Le 29-juin-05, à 00:10, Peter Kammel a écrit :

> Dear Rene,
>
> We brought your trigger FPFA to Illinios to test our verilog code.
> Before using it, I want to be sure that the pin terminations are
> correct. They should be, as we are using the project files defined
> by you.
>
> I cannot remember exactly. Is it the termination of unused pins
> which has to be defined correctly?
>
> Thanks again for your module.
>
> With best regards
>
> Peter
>
> Peter Kammel  /  pkammel@uiuc.edu
> Department of Physics, Loomis Laboratory
> University of Illinois at Urbana-Champaign
> 1110 West Green Street, Urbana, IL 61801
> Tel (217) 333-5424 / Fax (217) 333-1215
>
>
>
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  René PRIEELS                                   Universite Catholique 
de Louvain
  email: R.Prieels@fynu.ucl.ac.be     Departement de Physique / FYNU
  Tel  : ++ 32 (0)10 / 47 32 09             Chemin du cyclotron, 2
  Fax  : ++ 32 (0)10 / 45 21 83            B-1348 Louvain-la-Neuve - 
BELGIUM
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